FPGA Engineer-Contract-San Francisco, Ca
- Lead a rapid prototype team to architect design, develop, and test RTL based digital communication system solutions for our Software-Defined Radio system.
- Work with the system, hardware, and software groups to define, architect, develop, verify, and release RTL based DSP IP logic blocks.
- Architect, Design, develop, integrate, and debug IP blocks using a mixture of software and hardware languages.
- Simulation and hardware validation of large design, including lab, debug, and internal user support.
- Deploy and maintain acceleration solutions to meet significant reliability and service level requirements.
- Bachelor of Science degree in electrical engineering, computer science, computer engineering, or equivalent technical degree
- Demonstrated experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test)
- Strong proficiency with Verilog (preferably SystemVerilog) for both synthesis and verification
- Hardware debug experience, including familiarity with tools such as the oscilloscope, logic analyzer, protocol analyzer (SPI, CAN, Ethernet or similar)
- Demonstrated experience in digital communications (spread spectrum modulation, synchronization, fading, doppler, multiple access, channel capacity, and beamforming with mitigation strategies)
- Deep knowledge and understanding of digital design fundamentals.
- Strong competence of FPGA tooling including synthesis, building, timing analysis and simulation.
- Strong communication skills including the ability to author technical specifications, and procedures.
- Don’t meet them all? Not a problem. Please apply even if you do not meet all these criteria.
- Knowledge of space-grade/qualified FPGAs and ASICs.
- Knowledge of Circuit Card Assembly (CCA) design and development processes.
- Start-up experience. Demonstrate ability to work in a fast-paced environment.
Duration: up to 6 months
Please send resume to firstname.lastname@example.org